Drill2_1

//This Verilog test bench illustrates the different Verilog constants
module drill2_1;
	reg [7:0] a, b, c, d, e, f, g, h;
	reg [9:0] j;
	
	initial begin
		a=5'O37;
		b=3'D4;
		c=7'hx;
		d=8 'h AF;
		e=10'b01;
		f=4'd10;
		g=32;
		h=-5;
		$write("Testing");
		j=3.6E2;
		$write(" %o %b %b %h %b",a,b,c,d,e);
		$write(" %d %d %d  %d",f,g,h,j);
	end
endmodule

Drill2_2

//This Verilog test bench illustrates the different Verilog operators
module drill2_2;
	reg [3:0]Ctr, Xnr, Fdr;
	initial begin
		Ctr=4'd0; Fdr=4'd11;
 		#5 Xnr = (Ctr !=0) ? (Ctr *+ 1) : ^Fdr;
		#10 $display(Xnr);
		#15 Xnr=-9%2; Fdr=52<8'hFF;
		#20 $display(Xnr," ",Fdr);
		#25 Ctr=Xnr&&Fdr; Fdr=Xnr&Fdr;
		#30 $display(Ctr,Fdr);
		#35 Ctr=Ctr<<2; Fdr=Xnr>>1;
		#40 $display(Ctr, Fdr);
		#100 $finish;
	end
endmodule

Drill2_3

`timescale 10 ns / 100 ps
/*The time unit is set to 10 ns. During the simulation all delay values will be multiplied by 10 ns, and all delays will be rounded with 100 ps precision.*/

`define SIZE 8
`define STOP $finish
`define REGME reg [8*31:0]
`ifdef TEST_1
	`include "drill1_1.vl"
`else
	`include "drill1_2.vl"
`endif

module testbench;
	`REGME	regVar;
	reg	a, b,borrowIn;
	wire	diff, borrowOut;
	full_subtract		fs(diff, borrowOut, a, b, borrowIn);
	
	initial begin
		a=1'b1; b=1'b1; borrowIn=1'b0;
	end

	initial begin
		#10 a=1'b1;
		#10 a=1'b0; b=1'b1;
		#10 a=1'b1; b=1'b0;
		#10 borrowIn=1'b1;
	end

	initial begin
		$display("    a     b    borrowIn    difference   borrowOut  time");
		$monitor("%b  %b     %b    %b    %b   %d", a, b, borrowIn, diff, borrowOut, $time);
	#10 `STOP;
	end
endmodule

Exercise2_1

//exercise2_1
module exercise2_1;
	reg[0:7] a;
	reg [8:0] b,c,d,e,f,g,h,i,j;
	
	initial begin
		a = 8'h F1;
		b = 2E4;
		c = 8'h 48;
		d = 8'h 65;
		e = 8'h 6c;
		f = 8'h 6c;
		g = 8'h 6f;
		$display("%h %d", a, b,);
		$display("\\"," %% ", "\t ","\"");
		$display("%c%C%C%C%C",c,d,e,f,g);
	end
endmodule 

Exercise2_2

//exercise2_2
`timescale 1s / 100 ns
	`include "drill1_2.vl"
module testbench;
	reg a,b,borrowIn;
	wire diff,borrowOut;
	full_subtract fs(diff,borrowOut,a,b,borrowIn);

	initial begin
		a = 1'b1;
		b = 1'b1;
		borrowIn = 1'b0;
		#10 a = 1'b1;
		#10 a = 1'b0; b = 1'b1;
		#10 a = 1'b1; b = 1'b0;
		#10 borrowIn = 1'b1;
	end
initial begin
	$display(" a b borrowIn difference borrowOut time");
	$monitor(" %b %b %b %b %b %d ", a, b, borrowIn, diff, borrowOut, $time);
	#10 $finish;
end
endmodule

Exercise2_3

//exercise2_3
`define pi 3.1416
module exercise2_3;
	real r,s,AnsrRem;
	initial begin
		r = 9;
		s = 4/3;
		AnsrRem = s*`pi*r*r*r;
		$display("The volume of the cylinder is equal to ", AnsrRem, " cubic units");
	end
endmodule

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