Part I - Time Delay

A. Using LEDs

ORG 0000H
MAIN:
	CLR A
	MOV A, #06H
	MOV B, #03H
AGAIN:
	DEC A
	DJNZ B, AGAIN
MOV R0, #03H
DJNZ R0, $
ADD A, B
MOV P1, A
END

	B. Using Seven-Segment Display (SSD)

ORG 0000H
START:
	SETB P3.3
	SETB P3.4
ONE: CALL DELAY
	MOV A, P2
	MOV P1, A
	CALL DELAY
TWO: CLR P3.3
	CALL DELAY
	CLR A
	MOV A, P2
	MOV P1, A
	CALL DELAY
THREE: CLR P3.4
	SETB P3.3
	CALL DELAY
	CLR A
	MOV A, P2
	MOV P1, A
	CALL DELAY
FOUR: CLR P3.3
	CLR P3.4
	CALL DELAY
	CLR A
	MOV A, P2
	MOV P1, A
	CALL DELAY
	JMP START
DELAY: MOV R0, #45H
	DJNZ R0, $
	RET
END

Part II - I/O Port Interface with Time Delay

ORG 0000H
MAIN:
	CLR A
GETIN:
	CALL DELAY
	MOV A, P2
	CPL A
	JZ GETIN
	CPL A
	MOV P1, A
	CALL ROT
ROT:
	RR A
	MOV P1, A
	CALL ROT
DELAY:
	MOV R0, #0FH
L1: MOV R1, #01H
L2: MOV R2, #01H
	DJNZ R2, $
	DJNZ R1, L2
	DJNZ R0, L1
	RET
END

Laboratory Report: Click here to download the file